Open as of August 7, 2026

Senior DSP Engineer, Cyber

andurilindustriesWashington, District of Columbia, United States

Job description

Anduril Industries is a defense technology company with a mission to transform U.S. and allied military capabilities with advanced technology. By bringing the expertise, technology, and business model of the 21st century’s most innovative companies to the defense industry, Anduril is changing how military systems are designed, built and sold. Anduril’s family of systems is powered by Lattice OS, an AI-powered operating system that turns thousands of data streams into a realtime, 3D command and control center. As the world enters an era of strategic competition, Anduril is committed to bringing cutting-edge autonomy, AI, computer vision, sensor fusion, and networking technology to the military in months, not years.

ABOUT THE TEAM

Anduril Cyber is focused on positioning Anduril as a lead provider of capabilities to enable offensive cyber missions. Cyber is a new business line at Anduril, and relies upon our fleet of autonomous vehicles, Lattice operating system, mesh networks, and other hardware products to engage in cyber operations at the edge. We design and build novel solutions to deploy cyber capabilities in unconventional or difficult to reach environments Anduril Cyber is hiring a Software Engineer focused on embedded and mission software integration. Strong candidates may lean more heavily toward embedded-platform or mission/backend work, but should be comfortable collaborating across adjacent layers that connect devices, operators, and data products.

ABOUT THE JOB

Anduril Cyber is hiring a DSP Engineer with strong fundamentals in signal processing, waveform analysis, performance characterization, and translation of algorithms into production-ready implementations. The role emphasizes practical algorithm ownership and close partnership with FPGA, software, and systems engineering.

Develop and evaluate signal-processing approaches for detection, characterization, demodulation, channelization, and spectral analysis.
Translate analytical models and early-stage algorithms into implementations that can be integrated with FPGA and software systems.
Characterize throughput, fidelity, timing, and robustness tradeoffs using measured data and disciplined performance analysis.
Partner with FPGA engineers on architecture partitioning, samples-per-clock tradeoffs, and implementation constraints.
Create documentation, analysis artifacts, and technical recommendations that support design reviews and engineering decisions.
Contribute to a hands-on engineering culture that values experimentation, measurement, and rapid technical iteration.

REQUIRED QUALIFICATIONS

Strong background in digital signal processing, including FFT/PSD analysis, channelization, demodulation, filtering, and waveform analysis.
Proficiency in Python and/or MATLAB for algorithm development, analysis, test harnesses, and characterization workflows.
Experience converting signal-processing concepts into deployable implementations while managing fidelity, throughput, and hardware constraints.
Solid understanding of RF-domain concepts and the practical realities of sampled wideband systems.
Experience designing and interpreting experiments to evaluate timing, linearity, spectral behavior, and performance margins.
Ability to work effectively across DSP, FPGA, systems, and software boundaries rather than operating as a narrow algorithm specialist.
Strong documentation and communication skills for explaining technical tradeoffs and recommended design choices.

PREFERRED QUALIFICATIONS

Experience with GNU Radio, SDR tooling, or similar signal-processing integration environments.
Background collaborating on FPGA/SoC-based systems or other tightly coupled FPGA/DSP architectures.
Experience with real measured data sets, lab characterization workflows, and iterative tuning based on hardware observations.
Familiarity with customer-facing technical briefings, design reviews, or cross-functional architecture discussions.
Track record of mentoring junior engineers or leading signal-processing work across a broader team.

US Salary Range

$166,000—$220,000 USD

The salary range for this role is an estimate based on a wide range of compensation factors, inclusive of base salary only. Actual salary offer may vary based on (but not limited to) work experience, education and/or training, critical skills, and/or business considerations. Highly competitive equity grants are included in the majority of full time offers; and are considered part of Anduril's total compensation package. Additionally, Anduril offers top-tier benefits for full-time employees, including:

Benefits

At Anduril, we invest in our people. Our comprehensive, competitive benefits package (available at little to no cost to employees) ensures you’re supported in health, recovery, and whatever comes next. For more information, Explore Our Benefits.

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